===========================================================================================
Hitachi Vantara BIOS RELEASE NOTES for S5BH/S5BVH
===========================================================================================
Project Name      : S5BH/S5BVH
BIOS Version      : S5BH3B14.H01
Build Date        : 2019/7/10
Update BootBlock  : YES
Clear NVRAM       : YES
BIN Checksum(32MB): 58c02a30
ROM Checksum(16MB): a3a714d9
BIN_enc Checksum  : 58c06ccd
BIN MD5(32MB)     : 1ae0da3fdf3cc6f001487a8ee27fd7b3
ROM MD5(16MB)     : 76986bf46e3e1ee3953e14a494297647
BIN_enc MD5       : a3a1576ff0ee0ac5c0cc4533468a859c

===========================================================================================
                             HARDWARE REQUIREMENTS/REVISIONS
===========================================================================================
System hardware revision supported: S5BH (1U/2U)/S5BVH motherboard. (B0/B1/S0 PCH)

===========================================================================================
                             INTEL PROCESSOR MICROCODE REVISIONS
===========================================================================================
----------------------+----------------------------------------------------+---------------
Filename              | Description                                        | Stepping(s)     
----------------------+----------------------------------------------------+---------------
MB750654_0200005E.mcb | H-0/M-0/U-0 stepping processor signature 00050654  | H-0/M-0/U-0 (Skylake Server)
MB750655_03000010.mcb | A-0         stepping processor signature 00050655  | A-0 (CascadeLake Server)
MBF50656_04000024.mcb | B-0/L-0/R-0 stepping processor signature 00050656  | B-0/L-0/R-0 (CascadeLake Server)
MBF50657_05000024.mcb | B-1/L-1/R-1 stepping processor signature 00050657  | B-1/L-1/R-1 (CascadeLake Server)
----------------------+----------------------------------------------------+---------------

===========================================================================================
                             SYSTEM FIRMWARE REQUIREMENTS/REVISIONS
===========================================================================================
BIOS Core Version                 : 5.14
BIOS Compliancy                   : UEFI 2.7.0; PI 1.6
AMI BIOS Label                    : 5.14_PurleyCrb_0ACLA046
VGA (embedded in AST2500)         : 1.08.00
Intel(R) SPS F/W (ME)             : SPS_E5_04.01.04.296.0
BMC Override XML Version          : v10 (Override)
Intel(R) RC                       : 0584.D01
Intel(R) BIOS ACM                 : v1.7.1 (PW)
Intel(R) SINIT ACM                : v1.7.2 (PW)
Intel(R) RSTe PreOS Components    : v6.0.0.1024
HFI1 UEFI Driver                  : v1.9.2.0
FPK X722 GbE FW                   : LBG_B1_PHY_Auto_Detect_NCSI_LED_ACT_QCTv004_v3.45_80000B4B.bin
Lewisburg X722 GbE UEFI driver    : 2.5.07
Lewisburg X722 GbE PXE OPROM      : 1.0.66
Lewisburg X722 GbE iSCSI OPROM    : 3.1.29
EEPROM version of NVM image       : 0004
AFU version                       : v5.11.06.1854
Intel BKC Version                 : 2019_WW16 (KIT #131812) PLR1
QS  DCPMM Module Firmware         : fw_ekvb0_1.2.0.5375_encrypt_signed_strip.bin

===========================================================================================
                             IMPORTANT INSTALLATION NOTES
===========================================================================================
WARNING:
A. It is very important to follow the flash option provided in the batch file (BIOS_efi64.nsh/
   ME_efi64.nsh for UEFI Shell, BIOS_win64.cmd/ME_win64.cmd for Windows 64 bits, BIOS_lnx64.sh/ME_lnx64.sh for Linux 64 bits). 
   Using incorrect flash option to flash BIOS may cause damage to your system.

B. After BIOS S5BH3B10, system will not support DCPMM(or AEP) DIMM firmware 01.00.00.4707(BKC WW17) or earlier version.
   Please update your DCPMM firmware to BKC WW20 or later before flashing BIOS S5BH3B10 or later.

C. Please update to the corresponding version of BIOS prior to the update of the DCPMM FW.

1. Burn S5BH3Bxx.BIN via fixture

2. For UEFI  Shell environment, follow below steps to update BIOS:
   (1) Unzip the release package to the same folder in a HDD or USB Flash Drive.
   (2) Insert the USB Flash Drive or HDD mentioned in step (1).
   (3) Power on the system and boot into "Build-in EFI Shell"
   (4) Execute batch file BIOS_efi64.nsh to update BIOS.
   (5) Execute batch file ME_efi64.nsh to update ME FW.
   (6) After the update finished, reboot the system, the new BIOS/ME FW runs.
   (7) Enter BIOS setup, press <F9> to load default and save before any test run.
 
3. For x64 Windows environment, follow below steps to update BIOS:
   (1) Power on the system and boot into Windows OS.
   (2) Unzip the release package to the same folder in the HDD.
   (3) Open Command Prompt, change to the folder with release package located.
   (4) Execute batch file BIOS_win64.cmd to update BIOS.
   (5) Execute batch file ME_win64.cmd to update ME FW.
   (6) After the update finished, reboot the system, the new BIOS/ME FW runs.
   (7) Enter BIOS setup, press <F9> to load default and save before any test run.
   
4. For x64 Linux environment, follow below steps to update BIOS:
   (1) Power on the system and boot into Linux OS.
   (2) Unzip the release package to the same folder in the HDD.
   (3) Open Terminal, change to the folder with release package located.
   (4) Type "chmod -R 777 *" to change privilege for all files and folders.
   (5) Execute batch file BIOS_lnx64.sh to update BIOS.
   (6) Execute batch file ME_lnx64.sh to update ME FW.
   (7) After the update finished, reboot the system, the new BIOS/ME FW runs.
   (8) Enter BIOS setup, press <F9> to load default and save before any test run.
   
5. If update BIOS from version before 3A10.HXX (include 3A10.HXX) to S5BH3Bxx, please use fixture to udpate or
   BIOS package update to S5BH3B13.H01 first and then update to later version. Since in S5BH3B13.H01 package, afu update script added parameter /X,
   that will skip ROM ID check. If /X is not added, update from 3A10.HXX or older versions to S5BH3B13.H01 will fail because ROM ID had changed.

6. It is not recommended to downgrade CLX BIOS (S5BH3BXX) to SKX BIOS (3A10.HXX) since SKX BIOS can't support CLX CPU.
   If you have to downgrade to SKX BIOS (3A10.HXX), please use fixture to update or follow the steps as below
   (1) Confirm you are using SKX CPU
   (2) Copy BIOS 3A10.HXX image to S5BH3BXX BIOS relates package folder which can support parameter /RLC:E updating entire BIOS region.
   (3) add parameter "/X" to skip ROM ID check when update BIOS 3A10.HXX via AFU tool.
   ex. In x64 Linux environment, "./afulnx64\Afulnx_64 3A10.HXX.BIN /P /B /K /N /L /X /RLC:E
       In UEFI Shell environment, "afuefi64\AfuEfi64.efi 3A10.HXX.BIN /P /B /K /N /L /X /RLC:E
       In x64 Windows environment, "afuwin64\afuwinx64.exe 3A10.HXX.BIN /P /B /K /N /L /X /RLC:E

Note:
- Before BMC 3.62, it may have 'PHY MAC restore to default'/'PHY become busy under OS' by inband/outband YAFUFLASH flash BIOS.
- After BMC 4.22, please use BIOS *.enc file to update BIOS by BMC outband support.
- BIOS_efi64.nsh/BIOS_win64.cmd/BIOS_lnx64.sh updates BIOS region only.
- ME_efi64.nsh/ME_win64.cmd/ME_lnx64.sh updates non-BIOS regions (include 10GbE/ME/PDR ...).
- AFUDOS tool is no longer supported, we provide UEFI/Windows/Linux environment tool for upgrade firmware.
- This BIOS already enable Security Flash feature, please make sure the BIOS image signed when you want upgrade it.
  Or it will report security check fail then upgrade fail.
- Please make sure the PHY ID match with the current system run NVM image, or X722 device will only left one and can't work.
- BIOS has support PLDM function to keep the setting after flashing BIOS, please confirm updated parameters include "/N /CLRCFG",
  if need to back to the default setting.
  ex. In x64 Linux environment, after BIOS_lnx64.sh execution for BIOS udpated, "./afulnx64\Afulnx_64 S5BH3Bxx.BIN /N /CLRCFG" to load default.
      In UEFI Shell enviro5nment, after BIOS_efi64.nsh execution for BIOS udpated, "afuefi64\AfuEfi64.efi S5BH3Bxx.BIN /N /CLRCFG" to load default.
      In x64 Windows environment, after BIOS_win64.cmd execution for BIOS udpated, "afuwin64\afuwinx64.exe S5BH3Bxx.BIN /N /CLRCFG" to load default.
- The Lewisburg X722 controller use 40 GbE driver, the ctrl+S function was removed after UEFI driver 1.6.20 version.
- BIOS will not support to update Lewisburg X722 NVM image in AFU updating process.
  Please use "NVM update tool" to update this image manually in OS.
- POST error "CMOS/NVRAM configuration cleared" will not present in POST screen due to multi-default setting, but it will be logged into SEL.
- Configuration rules related with DCPMM "must be followed":
  1. DCPMMs of capacities, firmware and stepping must be the same.
  2. DCPMMs of firmware need matching BKC version.
  3. DCPMMs of population recommend to follow INTEL's suggest.
  4. DCPMMs controller stepping must be same. If no follow, it will result in UEFI Fatal Error “DIMM controller revision mismatch”.
  5. Each DCPMM in the system must have the same SKU(ES or QS) with respect to the operating modes and features supported.
     If the DCPMM software detects that the system is populated with DCPMM with incompatible SKUs, it will operate in read-only mode.
     In this case, it will not allow changes to the DCPMMs and their associated capacity.
- Starting from WW46 BKC, Intel do NOT validate on RHEL 7.5.
- From BIOS S5BH3B10, BIOS use the Production Worth(PW) ACM Binary and "must" use production CPU samples.
  If TXT feature with PW ACM used on a platform with engineering samples, system may reset.
- According to Intel datasheet #556488 – Intel® Optane™ DC Persistent Memory Module Firmware Interface Specification, Revision 1.13,
  if Revision Number(RN) of DCPMM firmware is updated, DCPMM cannot be downgraded to a FW version whose RN is less than present version.
  Firmware version    01.02.00.5318
                       |  |  |    +--- 4-digit Build Number
                       |  |  +-------- 2-digit Security Revision Number (SV)
                       |  +----------- 2-digit Revision Number (RN)
                       +-------------- 2-digit Product Number (PN)
- After BKC 2018WW50, ES2 firmware is no longer updating.
- Performing a full SPI chip or Direct Firmware Update downgrade to SPS_E5_04.00.04.294.0 or 
  earlier requires a full AC cycle at the end of the downgrade process.
- Starting from WW08 BKC, BIOS enabled Short ARS on boot. Please wait for ARS to complete before updating the DCPMM FW.
- After BIOS S5BH3B13.H00, start supporting redfish version 1.5.a, must also update BMC to 4.57.06 or later which can support redfish version 1.5.a.
- If user need to update both BMC and BIOS via BMC webUI, will need to update BMC FW first, then update BIOS FW. 
  That is because before BIOS update, BMC will copy BIOS current setting to BIOS future setting. 
  If update BIOS first, BMC will loss BIOS future setting after BMC finish update.
- Do not downgrade DCPMM DIMMs to a version of DCPMM FW below PV/PRQ FW 1.2.0.5355 (WW08 BKC).
  Older DCPMM FW will not be supported and DIMMs could enter an undesired state effecting usability.
- Starting from S5BH3B14.H00, must also update BMC to 4.62.06, otherwise sending inventory data via redfish might be failed.

===========================================================================================
                             KNOWN ISSUES/WORKAROUNDS
===========================================================================================  
- According to Intel security advisory, BIOS is default disabled DCI interface by SPS ME xml and BIOS setup.
  This is a notice from Intel eMOW WW08, and TXT only works when DCI disable and no ITP connected.
  Also, DCI related setup has been removed since BIOS S5BH3B10 per security concern.
  
- Because RSD feature already implemented, it will send whole SMBIOS table with all system information to BMC. At the first new configuration 
  environment, BIOS will take a lot of time to send data while boot into OS or Shell.
  
- Please notice that if you execute BIOS online upgrade script continuous twice (after flash completely then execute again).
  The PLDM module will override the BIOS default again. It's current PLDM limitation, please do not execute BIOS upgrade script continuous.

- BIOS would skip flashing Lewisburg X722 GbE region in AFU ME update, please use addiotnal Intel nvmupdate tool to update 
  Lewisburg X722 GbE region when flash BIOS by AFU tool. But using WebUI can update BIOS version and Lewisburg X722 GbE region at the same time.

- The device strings of each boot option in Setup pop-up screen are limited to one line temporarily.
  Therefore some long device strings may be cut out in the end.

- "The ROM file information does not match with the system BIOS!" warning messages will appear when using 
  AFU tool to flash BIOS with rom layout change.
  Please add "/RLC:E" parameter in AFU scripts to flash BIOS image, or press "E" if ROM layout change warning messages appear.

- BIOS cannot detect MAC address in legacy boot mode on Mellanox LAN card ConnectX-4, ConnectX-5 in IB mode.

- Cascade Lake Server Qual (Intel® Xeon® Processor Scalable Family A0) has several issues that either limit or prevent 
  some capabilities of DCPMM from being evaluated. The Intel® Optane™ DC Persistent Memory Technology Sightings Report, 
  Doc #569957, contains details on features and functionality that are known to be blocked or affected by UEFI FW, 
  DCPMM Firmware, and other parts of the software stack.

- Apache Pass in Appdirect Mode when used with Windows RS5 may go into an non-reconfigurable state. Under investigation EIP-433841 IPS-00387013.

- Since BIOS rom layout changes between 3A10.HXX to S5BH3BXX, adding parameter "/RLC:E" to flash entire BIOS region.

- BCP region used to preserve BIOS setting would be flashed through AFU update including parameter "/RLC:E".
  Therefore, when updating BIOS to CLX BIOS from SKX BIOS, BIOS setting is not able to be preserved
  since the preserved region is flashsed 

- After S5BH3B13.H00 supporting redfish 1.5.a, the system inventory data implemented method is different from old version of redfish,
  hence some data including WWPN/WWNN of FiberChannel card in system inventory data is not ready.
  Please check WWPN/WWNN in SMBIOS type 165 or check it via IPMI command as a workaround.

===========================================================================================
                             FEATURES ADDED/MODIFY
===========================================================================================
S5BH3B14.H01:
- Add retry mechanism to handle the case of redfish would be not workdable when redfish connection is failed.

S5BH3B14.H00:
- Follow 5.14_PurleyCrb_0ACLA046_BETA to update related modules (RC0584.D01 PLR1)
- Update SKX CPU H0 stepping microcode to MB750654_0200005E.
- Update CLX CPU B0 stepping microcode to MBF50656_04000024.
- Update CLX CPU B1 stepping microcode to MBF50657_05000024.
- Update Intel(R) SPS F/W to SPS_E5_04_01_04_296_0.
- Improve the 1st boot time after BIOS upgrade with BIOS setting preserve condition.
- Implement Move BMC USB virtual CDROM disable command' from exitbootservice to POST end.
- [RSD] Modify the Socket Designation in SMBIOS Type 193.
- [Redfish] Modify "ChassisType" from "Sub Chassis" to "Sled" in BMC Redfish.
- [Redfish] Do not send DHCPv4 and DHCPv6 to BMC via Redfish.
- Disable Autonomous Core C-State to improve performance for S5BVH

S5BH3B13.H01:
- Add parameter /X /RLC:E in BIOS update script.

S5BH3B13.H00:
- Sync to 3B13 BIOS code base.
- Update to Redfish 1.5.a and use Host Interface.

S5BH3B10:
- Initial official released version.

===========================================================================================
                             FEATURES REMOVED
===========================================================================================
S5BH3B14.H01:
- N/A.

S5BH3B14.H00:
- N/A.

S5BH3B13.H01:
- N/A.

S5BH3B13.H00:
- N/A.

S5BH3B10:
- N/A.

===========================================================================================
                             ISSUES FIXED
===========================================================================================
S5BH3B14.H01:
- Fix many zero after Device Model string in SMBIOS Type 194.

S5BH3B14.H00:
- Fix #242007 Memory Rank information is not match between MCS and SMBIOS table.
- Fix #271782 When set "security boot" to enable and "Factory Key Provision" to Enabled, "EFI Shell" will disappear in boot override.
- Fix #271383 When set "Enable Intel TXT" to disable , dump SMBIOS via command "dmidecode -t 196" will keep on "01" instead of "00".
- Fix #265448 The SMBIOS Type 9 record M.2 Slot , but ''PCIe Riser Interface'' did not have M.2 slot on HW SPEC.
- Fix BMC WedUI don't show any MAC address when send the seventeenth MAC to BMC.
- Fix 128GB and 256GB AEP will show rank 4 in SMBIOS type 17.
- Fix AEP rank in memory topology is not match with SMBIOS type 17.
- [Redfish] Fix the incorrect value of StatusIndicator of NVMe device.
- [Redfish] Fix VirtualNic of inventory information is not exist if no any LAN card in the system.
- Fix #272982 SM3_256 PCR Bank function will disappear in BIOS menu after BIOS load default setting.

S5BH3B13.H01:
- N/A.

S5BH3B13.H00:
- Fix Rank info show 1Rank in BIOS setup menu, but shows 4R in SMBIOS Type 17(dmidecode). (eTrack #272630)
- Fix VirtualNic of inventory information is not exist if no any LAN card in the system. (eTrack #274436, 274422 and 274378)
- Fix AEP DIMM Memory Rank information is not match between MCS and SMBIOS table. (eTrack #242007)

S5BH3B10:
- N/A.

[END OF RELEASE NOTES]
